1. Field of the Invention
The invention relates generally to cache memory systems in computers and, more particularly, to an improved cache control system.
2. Related Art
Cache memory systems have been used in computers for many years and are intended to overcome access speed limitations of large storage devices by providing rapid access to a copy of a small set of a data held in a faster cache memory in anticipation of its likely use again in the near future.
However, one problem with cached memory is that very often the data structures that are accessed by computer programs do not fit into or are otherwise incompatible with the cache memory. One example of this is the referencing of a large matrix with a large stride. If the access to the computer memory is cached, then some of the memory accesses will cause a cache miss, that is the memory address sought by the computer is not in the cache. Thus every time a single element of the matrix is accessed a whole memory line may have to be brought into the cache. Very soon this memory line will be replaced by another subsequently referenced line, even before the rest of its elements have had a chance to be accessed.
Loading a cache line from memory has a certain cost associated with it both in terms of elapsed time and contention on the memory bus. In addition, it has a negative side effect by way of replacing an existing cache line which may be needed later. All in all, if the data structure is such that it does not fit into the cache, unnecessary memory traffic is created, resulting in poor performance.
In view of this problem some computers, for example the International Business Machines Corporation (IBM) Reduced Instruction Set Computer (RISC) System/6000 family of computers (IBM and RISC system/6000 are trade marks of International Business Machines Corporation, Armonk NY), have the facility to access memory in one of two different ways, either via cached access, that is access to the cache memory which causes an entire cache line to be retrieved from main memory to the cache memory if the required address is not already in the cache, or non-cached access, that is memory access in which only a single word is loaded directly from the main memory and which does not have any effect on the contents of the cache.